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Hardware-efficient designs for quantum error correction

Quantum error correction (QEC) protects the quantum information against various dissipation processes. The experimental implementation of QEC is still challenging, despite significant efforts and progress in recent years. For example, the standard qubit-based QEC requires a large overhead in the qubit counts with a high hardware complexity. In this dissertation, I will present three works towards more hardware-efficient realizations of QEC. First, I will talk about an experiment on the quantum parametric oscillator, where the generated cat states are potentially useful as bosonic qubits. Next, I will propose a Floquet qubit design in superconducting circuits that has a mechanical analog of Kapitza's pendulum. The qubit subspace is protected autonomously with an engineered cooling process. Finally, I will describe a numerical framework for automatically discovering autonomous QEC schemes

Zhaoyou Wang
Stanford University
Publication Date
Type of Dissertation
Ph.D. Applied Physics